HookA master's thesis turned three switches into every computer
In 1937 a 21-year-old MIT student named Claude Shannon handed in a master's thesis that has been called the most important of the century. He showed that the algebra George Boole had invented in 1854 to describe pure logic — true and false, and, or, not — mapped exactly onto electrical switches that are either on or off. Chain those switches together the right way and a circuit could reason. Every processor since, from the ARM chip in a Raspberry Pi to the billions of transistors in a modern phone, is Shannon's idea scaled up: logic gates wired into arrangements that add, compare and decide.
That is why OCR puts Boolean logic in Paper 2. The whole topic is only three gates — AND, OR and NOT — but the exam wants two skills built on them: reading or drawing a logic diagram, and completing a truth table that lists every possible combination of inputs and the output each one produces. Get disciplined about working left to right and counting inputs in binary, and this becomes one of the most reliable sources of marks on the paper. The trap is not difficulty — it is carelessness, a flipped bit, a missing row.
ModelThree gates, and nothing else
J277 uses exactly three logic gates, no more. An AND gate outputs 1 only when both inputs are 1 — think of two switches in series, both must close for the current to flow. An OR gate outputs 1 when either or both inputs are 1 — two switches in parallel, closing either one lets current through. A NOT gate (also called an inverter) has a single input and flips it: 1 becomes 0, 0 becomes 1.
OCR writes these operators three ways, and the mark scheme accepts any of them, so recognise all three. AND is written as A AND B, A ∧ B, or A.B. OR is written as A OR B, A ∨ B, or A + B. NOT is written as NOT A, ¬A, or A with a bar over it. The dot-and-plus notation is a deliberate trap: A + B does not mean addition here, it means OR. Learn each gate by its single-gate truth table, because every larger table is just these three rules applied column by column.
Everything a computer does with logic is built from combining these. There is no XOR, NAND or NOR on this specification — if you find yourself reaching for one, you have over-complicated the problem.
The three single-gate truth tables, which you should be able to reproduce from memory. NOT (one input): input 0 gives 1; input 1 gives 0. AND (inputs A, B): 0 and 0 give 0; 0 and 1 give 0; 1 and 0 give 0; only 1 and 1 give 1. OR (inputs A, B): 0 and 0 give 0; 0 and 1 give 1; 1 and 0 give 1; 1 and 1 give 1. Notice the shape: AND is 1 in just one row of four, OR is 0 in just one row of four, and NOT is the mirror image of its input.
MechanismReading and drawing a logic diagram
A logic diagram shows the gates as symbols with signals flowing left to right: inputs enter on the left, pass through one or more gates, and produce an output on the right. You are expected both to interpret a given diagram and to draw one from a description. When you draw, use the standard gate symbols — the D-shape for AND, the curved shield for OR, and the triangle-with-a-bubble for NOT — and label every input and the final output clearly.
The method for tracing a diagram is the same every time: work out the output of the first gate, write that value on the wire, then feed it into the next gate. Never try to jump straight from inputs to the final answer in your head. Treat each gate as a tiny lookup using the single-gate tables above, and carry the intermediate value forward. When you draw a diagram from words, translate each logical word into its gate: 'both' or 'as well as' means AND, 'either' means OR, and 'not' or 'unless' means NOT, then wire them in the order the sentence describes.
Examiners deduct marks for the small things — a missing input label, the wrong gate symbol, or a wire that skips a gate — so slow down on the drawing itself.
A house alarm sounds when the system is armed AND either the door OR the window is opened. Inputs: Armed (A), Door (D), Window (W). Build it in two stages. Stage one: an OR gate takes D and W, giving a signal we can call Breach. Stage two: an AND gate takes Armed and Breach, giving the output Sound. So Sound = A ∧ (D ∨ W). Trace one case: the house is armed (A = 1), the window is smashed (W = 1) but the door is shut (D = 0). OR gate: D ∨ W = 0 ∨ 1 = 1, so Breach = 1. AND gate: A ∧ Breach = 1 ∧ 1 = 1, so Sound = 1 — the alarm goes off. Now trace a disarmed house (A = 0) with the door open (D = 1): Breach = 1, but A ∧ Breach = 0 ∧ 1 = 0, so Sound = 0. The arming input gates everything, exactly as the sentence said.
ModelTruth tables — the whole behaviour on one page
A truth table lists every possible combination of inputs and the output for each. The number of rows is fixed by the number of inputs: two inputs give four rows, three inputs give eight rows — the rule is two to the power of the number of inputs. On this specification you will never face more than three inputs, so the biggest table you build has eight rows.
The single most important habit is to fill in the input columns by counting up in binary, so you can never miss or repeat a combination. For three inputs A, B, C the rows go 000, 001, 010, 011, 100, 101, 110, 111 — that is 0 to 7 in binary. Rightmost column alternates every row (0,1,0,1…), the middle column alternates in pairs (0,0,1,1…), and the leftmost in fours. Get that pattern down mechanically and the inputs are always correct.
Then add a working column for each gate in the expression before the final output column. Those intermediate columns are where the method marks live, and they make follow-through marking possible if you slip once.
Build the input side of a three-input table so it is provably complete. Row 0: A=0 B=0 C=0. Row 1: A=0 B=0 C=1. Row 2: A=0 B=1 C=0. Row 3: A=0 B=1 C=1. Row 4: A=1 B=0 C=0. Row 5: A=1 B=0 C=1. Row 6: A=1 B=1 C=0. Row 7: A=1 B=1 C=1. Read the C column down — 0,1,0,1,0,1,0,1 — and the A column down — 0,0,0,0,1,1,1,1. If your columns do not show that clean alternating pattern, you have made an ordering error before you have evaluated a single gate.
DataCombining operators — the brackets decide the answer
The exam's harder logic questions combine two or three operators, for example Q = (A ∧ B) ∨ ¬C. Brackets tell you the order of evaluation, and getting that order right is the whole game. Evaluate what is inside the brackets first, evaluate any NOT on a single variable, then combine. Do it as separate columns rather than in your head.
The reliable method: give each gate its own column, fill each column using the single-gate rules, then compute the final output column from those. Never collapse three operations into one glance across a row — that is exactly where a bit gets flipped. If the question gives you the expression, your job is the table; if it gives you the table or a scenario, your job is to write the expression. Both directions are examined.
Complete the truth table for Q = (A ∧ B) ∨ ¬C. Working columns: (A ∧ B) and ¬C, then Q which ORs them together.
Row 000: A ∧ B = 0, ¬C = 1, so Q = 0 ∨ 1 = 1.
Row 001: A ∧ B = 0, ¬C = 0, so Q = 0 ∨ 0 = 0.
Row 010: A ∧ B = 0, ¬C = 1, so Q = 1.
Row 011: A ∧ B = 0, ¬C = 0, so Q = 0.
Row 100: A ∧ B = 0, ¬C = 1, so Q = 1.
Row 101: A ∧ B = 0, ¬C = 0, so Q = 0.
Row 110: A ∧ B = 1, ¬C = 1, so Q = 1 ∨ 1 = 1.
Row 111: A ∧ B = 1, ¬C = 0, so Q = 1 ∨ 0 = 1.
Output column down: 1, 0, 1, 0, 1, 0, 1, 1. Sanity check — Q is 1 whenever C is 0 (because ¬C alone makes the OR true), and the only extra 1 comes at row 111 where A and B are both set. That plain-English check catches most slips.
MechanismFrom a problem in words to a Boolean expression
The application marks come from turning a described system into logic. A light should switch on when it is dark and someone is present, unless the manual override is off — that sentence is a Boolean expression waiting to be written. Map each phrase: 'dark and present' is Dark ∧ Present, and 'unless override off' inverts and gates the override in. Name your inputs with single letters first, translate phrase by phrase, and only then draw the diagram or table.
The give-away words are consistent. 'Both', 'as well as' and 'together with' signal AND. 'Either', 'or', 'at least one' signal OR. 'Not', 'never', 'unless' and 'except when' signal NOT. Underlining those words in the question before you start stops you wiring an OR where an AND belongs — the most common way a whole answer goes wrong from a single misread word.
VocabularyKey terms the mark scheme pays for
TrapsMisconceptions that cost marks
ExamWhat examiners want
Boolean logic sits in Paper 2 (J277/02) and rewards method over cleverness. For truth tables, always fill the input columns by counting up in binary (000, 001, 010…) so you can prove no combination is missing, and always add a working column for each intermediate gate before the output column. Those working columns earn method marks and let the examiner award follow-through credit if you make one slip — a bare final column that is wrong scores zero, whereas correct working columns with one downstream error still score.
When drawing a logic diagram, use the correct standard symbols and label every input and the output; a right idea drawn with the wrong gate symbol is marked wrong. When writing an expression from a scenario (an AO2 application task), underline the logical words first — 'both' for AND, 'either' for OR, 'not/unless' for NOT — and name your inputs as single letters before you wire anything.
Finally, read the mark allocation: a 4-mark truth table usually credits the input combinations, each working column, and the final output separately, so show them all. Never rub out your intermediate columns to make the page tidy — they are where most of the marks are.